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www.irf.com 1 6/29/00 irfb23n15d irFS23N15D irfsl23n15d smps mosfet hexfet ? power mosfet l high frequency dc-dc converters benefits applications l low gate-to-drain charge to reduce switching losses l fully characterized capacitance including effective c oss to simplify design, (see app. note an1001) l fully characterized avalanche voltage and current v dss r ds(on) max i d 150v 0.090 w 23a typical smps topologies l telecom 48v input dc-dc active clamp reset forward converter d 2 pak irFS23N15D to-220ab irfb23n15d to-262 irfsl23n15d parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 23 i d @ t c = 100c continuous drain current, v gs @ 10v 17 a i dm pulsed drain current ? 92 p d @t a = 25c power dissipation ? 3.8 w p d @t c = 25c power dissipation 136 linear derating factor 0.9 w/c v gs gate-to-source voltage 30 v dv/dt peak diode recovery dv/dt ? 4.1 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c mounting torqe, 6-32 or m3 screw ? 10 lbf?in (1.1n?m) absolute maximum ratings notes ? through ? are on page 11 pd - 93894a www..net
irfb/irfs/irfsl23n15d 2 www.irf.com parameter min. typ. max. units conditions g fs forward transconductance 11 CCC CCC s v ds = 25v, i d = 14a q g total gate charge CCC 37 56 i d = 14a q gs gate-to-source charge CCC 9.6 14 nc v ds = 120v q gd gate-to-drain ("miller") charge CCC 19 29 v gs = 10v, ? t d(on) turn-on delay time CCC 10 CCC v dd = 75v t r rise time CCC 32 CCC i d = 14a t d(off) turn-off delay time CCC 18 CCC r g = 5.1 w t f fall time CCC 8.4 CCC v gs = 10v ? c iss input capacitance CCC 1200 CCC v gs = 0v c oss output capacitance CCC 260 CCC v ds = 25v c rss reverse transfer capacitance CCC 65 CCC pf ? = 1.0mhz ? c oss output capacitance CCC 1520 CCC v gs = 0v, v ds = 1.0v, ? = 1.0mhz c oss output capacitance CCC 120 CCC v gs = 0v, v ds = 120v, ? = 1.0mhz c oss eff. effective output capacitance CCC 210 CCC v gs = 0v, v ds = 0v to 120v ? dynamic @ t j = 25c (unless otherwise specified) ns parameter typ. max. units e as single pulse avalanche energy ? CCC 260 mj i ar avalanche current ? CCC 14 a e ar repetitive avalanche energy ? CCC 13.6 mj avalanche characteristics s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode) ? CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC 1.3 v t j = 25c, i s = 14a, v gs = 0v ? t rr reverse recovery time CCC 150 220 ns t j = 25c, i f = 14a q rr reverse recoverycharge CCC 0.8 1.2 c di/dt = 100a/s ? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) diode characteristics 23 92 a static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 150 CCC CCC v v gs = 0v, i d = 250a d v (br)dss / d t j breakdown voltage temp. coefficient CCC 0.18 CCC v/c reference to 25c, i d = 1ma r ds(on) static drain-to-source on-resistance CCC CCC 0.090 w v gs = 10v, i d = 14a ? v gs(th) gate threshold voltage 3.0 CCC 5.5 v v ds = v gs , i d = 250a CCC CCC 25 a v ds = 150v, v gs = 0v CCC CCC 250 v ds = 120v, v gs = 0v, t j = 150c gate-to-source forward leakage CCC CCC 100 v gs = 30v gate-to-source reverse leakage CCC CCC -100 na v gs = -30v i gss i dss drain-to-source leakage current thermal resistance parameter typ. max. units r q jc junction-to-case CCC 1.1 r q cs case-to-sink, flat, greased surface ? 0.50 CCC c/w r q ja junction-to-ambient ? CCC 62 r q ja junction-to-ambient ? CCC 40 www..net
irfb/irfs/irfsl23n15d www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.01 0.1 1 10 100 0.1 1 10 100 20 s pulse width t = 25 c j top bottom vgs 15v 12v 10v 8.0v 7.0v 6.0v 5.5v 5.0v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 5.0v 1 10 100 0.1 1 10 100 20s pulse width t = 175 c j top bottom vgs 15v 12v 10v 8.0v 7.0v 6.0v 5.5v 5.0v v , drain-to-source volta g e (v) i , drain-to-source current (a) ds d 5.0v 0.1 1 10 100 4 5 6 7 8 9 10 11 12 v = 50v 20s pulse width ds v , gate-to-source volta g e (v) i , drain-to-source current (a) gs d t = 25 c j t = 175 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 23a www..net
irfb/irfs/irfsl23n15d 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0.1 1 10 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 v ,source-to-drain volta g e (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 175 c j 1 10 100 1000 1 10 100 1000 operation in this area limited by r ds(on) single pulse t t = 175 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms 1 10 100 1000 v ds , drain-to-source voltage (v) 10 100 1000 10000 c, capacitance(pf) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 10 20 30 40 50 60 0 4 8 12 16 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 14a v = 30v ds v = 75v ds v = 120v ds www..net
irfb/irfs/irfsl23n15d www.irf.com 5 fig 10a. switching time test circuit v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms v ds pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10v + - v dd fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 25 50 75 100 125 150 175 0 5 10 15 20 25 t , case temperature ( c) i , drain current (a) c d www..net
irfb/irfs/irfsl23n15d 6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 m f 50k w .2 m f 12v current regulator same type as d.u.t. current sampling resistors + - 10 v fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 w t p d.u.t l v ds + - v dd driver a 15v 20v 25 50 75 100 125 150 175 0 100 200 300 400 500 600 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 14a 9.8a 5.6a www..net
irfb/irfs/irfsl23n15d www.irf.com 7 p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfet ? power mosfets * v gs = 5v for logic level devices peak diode recovery dv/dt test circuit ? ? ? r g v dd dv/dt controlled by r g driver same type as d.u.t. i sd controlled by duty factor "d" d.u.t. - device under test d.u.t circuit layout considerations low stray inductance ground plane low leakage inductance current transformer ? * www..net
irfb/irfs/irfsl23n15d 8 www.irf.com lead assignments 1 - g a t e 2 - d r a in 3 - s o u r c e 4 - d r a in - b - 1.32 (.052) 1.22 (.048) 3x 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 4.69 (.185) 4.20 (.165) 3x 0.93 (.037) 0.69 (.027) 4.06 (.160) 3.55 (.140) 1.15 (.045) m in 6.47 (.255) 6.10 (.240) 3.78 (.149) 3.54 (.139) - a - 10.54 (.415) 10.29 (.405) 2.87 (.113) 2.62 (.103) 15.24 (.600) 14.84 (.584) 14.09 (.555) 13.47 (.530) 3x 1.40 (.055) 1.15 (.045) 2.54 (.100) 2x 0.3 6 (.014 ) m b a m 4 1 2 3 notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 3 o utline conforms to jedec outline to-220ab. 2 c o n tr o llin g d im e n s io n : in c h 4 h e a t s in k & le a d m e a s u r e m e n t s d o n ot include burrs. to-220ab part marking information to-220ab package outline dimensions are shown in millimeters (inches) part number international rectifier lo g o example : this is an irf1010 w ith as se m bly lo t c o de 9b 1m assembly lot co de date code (yyww) yy = year w w = w ee k 9246 irf1010 9b 1m a www..net
irfb/irfs/irfsl23n15d www.irf.com 9 d 2 pak package outline d 2 pak part marking information 10.16 (.400) re f. 6.47 (.255) 6.18 (.243) 2.61 (.103) 2.32 (.091) 8.89 (.350) r e f. - b - 1.32 (.052) 1.22 (.048) 2.79 (.110) 2.29 (.090) 1.39 (.055) 1.14 (.045) 5.28 (.208) 4.78 (.188) 4.69 (.185) 4.20 (.165) 10.54 (.415) 10.29 (.405) - a - 2 1 3 15.49 (.610) 14.73 (.580) 3x 0.93 (.037) 0.69 (.027) 5.08 (.200) 3x 1.40 (.055) 1.14 (.045) 1.78 (.070) 1.27 (.050) 1.40 (.055) m ax. notes: 1 dimensions after solder dip. 2 dimensioning & tolerancing per ansi y14.5m, 1982. 3 controlling dimension : inch. 4 heatsink & lead dimensions do not include burrs. 0.55 (.022) 0.46 (.018) 0.25 (.010) m b a m minimum recommended footprint 11.43 (.450) 8.89 (.350) 17.78 (.700) 3.81 (.150) 2.08 (.082) 2x lead assignments 1 - ga te 2 - d r ain 3 - s ou rc e 2.54 (.100) 2x part number international rectifier logo date code (yyw w ) yy = year ww = week assembly lot code f530s 9b 1m 9246 a www..net
irfb/irfs/irfsl23n15d 10 www.irf.com to-262 part marking information to-262 package outline www..net
irfb/irfs/irfsl23n15d www.irf.com 11 d 2 pak tape & reel information 3 4 4 trr feed direction 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) trl feed direction 10.90 (.429) 10.70 (.421) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957) 23.90 (.941) 0.368 (.0145) 0.342 (.0135) 1.60 (.063) 1.50 (.059) 13.50 (.532) 12.80 (.504) 330.00 (14.173) max. 27.40 (1.079) 23.90 (.941) 60.00 (2.362) min. 30.40 (1.197) max. 26.40 (1.039) 24.40 (.961) notes : 1. comforms to eia-418. 2. controlling dimension: millimeter. 3. dimension measured @ hub. 4. includes flange distortion @ outer edge. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 ir european regional center: 439/445 godstone rd, whyteleafe, surrey cr3 obl, uk tel: ++ 44 (0)20 8645 8000 ir canada: 15 lincoln court, brampton, ontario l6t3z2, tel: (905) 453 2200 ir germany: saalburgstrasse 157, 61350 bad homburg tel: ++ 49 (0) 6172 96590 ir italy: via liguria 49, 10071 borgaro, torino tel: ++ 39 011 451 0111 ir japan: k&h bldg., 2f, 30-4 nishi-ikebukuro 3-chome, toshima-ku, tokyo 171 tel: 81 (0)3 3983 0086 ir southeast asia: 1 kim seng promenade, great world city west tower, 13-11, singapore 237994 tel: ++ 65 (0)838 4630 ir taiwan: 16 fl. suite d. 207, sec. 2, tun haw south road, taipei, 10673 tel: 886-(0)2 2377 9936 data and specifications subject to change without notice. 6/00 ? repetitive rating; pulse width limited by max. junction temperature. ? i sd 14a, di/dt 240a/s, v dd v (br)dss , t j 175c notes: ? starting t j = 25c, l = 2.7mh r g = 25 w , i as = 14a. ? pulse width 300s; duty cycle 2%. ? c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss ? this is only applied to to-220ab package ? this is applied to d 2 pak, when mounted on 1" square pcb ( fr-4 or g-10 material ). for recommended footprint and soldering techniques refer to application note #an-994. www..net

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